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  Datasheet File OCR Text:
 ON Semiconductort
Darlington Transistor
NPN Silicon
MAXIMUM RATINGS
Rating Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current -- Continuous Symbol VCEO VCBO VEBO IC Value 40 40 12 500 Unit Vdc
MMBT6427LT1
ON Semiconductor Preferred Device
3
Vdc Vdc mAdc
1 2
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR-5 Board(1) TA = 25C Derate above 25C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25C Derate above 25C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 -55 to +150 Unit mW mW/C C/W mW mW/C C/W C
CASE 318-08, STYLE 6 SOT-23 (TO-236AB)
COLLECTOR 3 BASE 1
EMITTER 2
DEVICE MARKING
MMBT6427LT1 = 1V
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector-Emitter Breakdown Voltage (IC = 10 mAdc, VBE = 0) Collector-Base Breakdown Voltage (IC = 100 mAdc, IE = 0) Emitter-Base Breakdown Voltage (IC = 10 mAdc, IC = 0) Collector Cutoff Current (VCE = 25 Vdc, IB = 0) Collector Cutoff Current (VCB = 30 Vdc, IE = 0) Emitter Cutoff Current (VEB = 10 Vdc, IC = 0) 1. FR-5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. V(BR)CEO 40 V(BR)CBO 40 V(BR)EBO 12 ICES -- ICBO -- IEBO -- 50 50 nAdc 1.0 nAdc -- Adc -- Vdc -- Vdc Vdc
Preferred devices are ON Semiconductor recommended choices for future use and best overall value.
(c) Semiconductor Components Industries, LLC, 2001
1
March, 2001 - Rev. 1
Publication Order Number: MMBT6427LT1/D
MMBT6427LT1
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain (IC = 10 mAdc, VCE = 5.0 Vdc) (IC = 100 mAdc, VCE = 5.0 Vdc) (IC = 500 mAdc, VCE = 5.0 Vdc) Collector-Emitter Saturation Voltage (IC = 50 mAdc, IB = 0.5 mAdc) (IC = 500 mAdc, IB = 0.5 mAdc) Base-Emitter Saturation Voltage (IC = 500 mAdc, IB = 0.5 mAdc) Base-Emitter On Voltage (IC = 50 mAdc, VCE = 5.0 Vdc) hFE 10,000 20,000 14,000 VCE(sat)(3) -- -- VBE(sat) -- VBE(on) -- 1.75 2.0 Vdc 1.2 1.5 Vdc 100,000 200,000 140,000 Vdc --
SMALL-SIGNAL CHARACTERISTICS
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz) Input Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) CurrentGain -- High Frequency (IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz) Noise Figure (IC = 1.0 mAdc, VCE = 5.0 Vdc, RS = 100 k, f = 1.0 kHz) 3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2.0%. Cobo -- Cibo -- |hfe| 1.3 NF -- 10 -- dB 15 Vdc 7.0 pF pF
RS
in en
IDEAL TRANSISTOR
Figure 1. Transistor Noise Model
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MMBT6427LT1
NOISE CHARACTERISTICS
(VCE = 5.0 Vdc, TA = 25C)
500 200 100 10 A 50 100 A 20 10 5.0 10 20 50 100 200 IC = 1.0 mA 2.0 1.0 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.03 500 1 k 2 k 5 k 10 k 20 k f, FREQUENCY (Hz) 50 k 100 k 0.02 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k f, FREQUENCY (Hz) 50 k 100 k 100 A 10 A
BANDWIDTH = 1.0 Hz RS 0 i n, NOISE CURRENT (pA)
BANDWIDTH = 1.0 Hz
en, NOISE VOLTAGE (nV)
IC = 1.0 mA
Figure 2. Noise Voltage
Figure 3. Noise Current
VT, TOTAL WIDEBAND NOISE VOLTAGE (nV)
200 BANDWIDTH = 10 Hz TO 15.7 kHz NF, NOISE FIGURE (dB) IC = 10 A
14 12 10 8.0 6.0 4.0 2.0 5.0 10 20 50 100 200 RS, SOURCE RESISTANCE (k) 500 1000 0 1.0 2.0 5.0 IC = 1.0 mA 100 A
BANDWIDTH = 10 Hz TO 15.7 kHz
100 70 50 30 20
10 A
100 A
1.0 mA
10
1.0
2.0
10 20 50 100 200 RS, SOURCE RESISTANCE (k)
500
1000
Figure 4. Total Wideband Noise Voltage
Figure 5. Wideband Noise Figure
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MMBT6427LT1
SMALL-SIGNAL CHARACTERISTICS
20 TJ = 25C |h fe |, SMALL-SIGNAL CURRENT GAIN 4.0 VCE = 5.0 V f = 100 MHz TJ = 25C
C, CAPACITANCE (pF)
10 7.0 5.0
2.0
Cibo Cobo
1.0 0.8 0.6 0.4
3.0
2.0 0.04
0.1
0.2 0.4 1.0 2.0 4.0 VR, REVERSE VOLTAGE (VOLTS)
10
20
40
0.2 0.5
1.0
2.0
0.5 10 20 50 100 200 IC, COLLECTOR CURRENT (mA)
500
Figure 6. Capacitance
Figure 7. High Frequency Current Gain
TJ = 125C
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
200 k 100 k 70 k 50 k 30 k 20 k 10 k 7.0 k 5.0 k 3.0 k
3.0 TJ = 25C 2.5 2.0 1.5 1.0 0.5 0.1 0.2 IC = 10 mA 50 mA 250 mA 500 mA
hFE, DC CURRENT GAIN
25C
-55C
VCE = 5.0 V 500
2.0 k 5.0 7.0
10
20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA)
0.5 1.0 2.0 5.0 10 20 50 100 200 IB, BASE CURRENT (A)
500 1000
Figure 8. DC Current Gain
Figure 9. Collector Saturation Region
RV, TEMPERATURE COEFFICIENTS (mV/C)
1.6 TJ = 25C 1.4 V, VOLTAGE (VOLTS) VBE(sat) @ IC/IB = 1000 1.2 VBE(on) @ VCE = 5.0 V 1.0 0.8 0.6
-1.0 -2.0 -3.0
*APPLIES FOR IC/IB hFE/3.0 *RqVC FOR VCE(sat)
25C TO 125C
-55C TO 25C
25C TO 125C -4.0 qVB FOR VBE -5.0 -6.0 5.0 7.0 10 -55C TO 25C
VCE(sat) @ IC/IB = 1000 5.0 7.0 10 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA) 500
20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA)
500
Figure 10. "On" Voltages
Figure 11. Temperature Coefficients
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MMBT6427LT1
1.0 0.7 0.5 0.3 0.2 0.1 0.1 0.07 0.05 0.03 0.02 0.01 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 t, TIME (ms) 100
D = 0.5 0.2 0.05 SINGLE PULSE SINGLE PULSE ZJC(t) = r(t) * RJC TJ(pk) - TC = P(pk) ZJC(t) ZJA(t) = r(t) * RJA TJ(pk) - TA = P(pk) ZJA(t) 200 500 1.0 k 2.0 k 5.0 k 10 k
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
Figure 12. Thermal Response
FIGURE A tP PP PP
t1 1/f t DUTY CYCLE + t1 f + 1 tP PEAK PULSE POWER = PP
Design Note: Use of Transient Thermal Resistance Data
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MMBT6427LT1 INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
0.037 0.95
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037 0.95
0.079 2.0 0.035 0.9 0.031 0.8
inches mm
SOT-23 SOT-23 POWER DISSIPATION The power dissipation of the SOT-23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-23 package, PD can be calculated as follows:
PD = TJ(max) - TA RJA SOLDERING PRECAUTIONS
* * *
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.
PD = 150C - 25C 556C/W = 225 milliwatts
* * *
The 556C/W for the SOT-23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT-23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
*
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. Always preheat the device. The delta temperature between the preheat and soldering should be 100C or less.* When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. The soldering temperature and time shall not exceed 260C for more than 10 seconds. When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
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MMBT6427LT1
PACKAGE DIMENSIONS SOT-23 (TO-236AB) CASE 318-08 ISSUE AE
A L
3 1 2
BS
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60
V
G
C D H K J
DIM A B C D G H J K L S V
STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR
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MMBT6427LT1
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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MMBT6427LT1/D


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